Search - vhdl fpga

[Software Engineering] FPGA

Description: 基于VHDL语言智力抢答器的设计本人的课程设计-Based on the VHDL language design intellectual Answer my curriculum design
Platform: | Size: 489472 | Author: 滕莹 | Hits:

[VHDL-FPGA-Verilog] FPGA-Ethernet-video

Description: 介绍如何用FPGA实现网络视频传输的设计论文，很有参考价值。-Introduce how to realize the network video transmission FPGA design papers, a good reference.
Platform: | Size: 190464 | Author: 曾祥进 | Hits:

[Other] FPGA

Description: FPGA设计常用资料大全，内含一些代码，还算比较全吧-Commonly used FPGA Design Sourcebook, contains some code, it is still relatively wide
Platform: | Size: 5459968 | Author: Lulu | Hits:

[VHDL-FPGA-Verilog] dds

Description: 基于VHDL+FPGA的DDS信号发生设计，已经通过调式-Based on VHDL+ FPGA design of the DDS signal has been through mode
Platform: | Size: 560128 | Author: 陈阳 | Hits:

[Algorithm] FFT(VHDL)

Description: 数字信号处理fft算法计算，用fpga开发，vhdl语言写成-Digital signal processing fft algorithm using FPGA development, vhdl language
Platform: | Size: 14336 | Author: 程钢 | Hits:

[Other] FPGA.Implementations.of.Neural.Networks

Description: 神经网络算法的FPGA实现，英文版，具有很强的实用价值-Neural network algorithm to achieve the FPGA, in English, has a strong practical value
Platform: | Size: 3942400 | Author: HENRRY | Hits:

Description: 采用VHDL语言设计一个4通道的数据采集控制模块。系统的功能描述如下： 1.系统主时钟为100 MHz。 2.数据为16位-数据线上连续2次00FF后数据传输开始。 3.系统内部总线宽度为8位。 4.共有4个通道（ch1、ch2、ch3、ch4），每个通道配备100 Bytes的RAM，当存满数据后停止数据采集并且相应通道的状态位产生报警信号。 5.数据分为8位串行输出，输出时钟由外部数据读取电路给出。 6.具备显示模块驱动功能。由SEL信号设置显示的通道，DISPLAY信号启动所选通道RAM中数值的显示过程。数值顺次显示一遍后显示结束，可以重新设定SEL的值选择下一个通道。模块数据线为8位，显示器件为4个8段LED。 7.数据采集模式如下：单通道采集（由SEL信号选择通道），多通道顺次采集（当前通道采满后转入下一通道），多通道并行采集（每通道依次采集一个数据）。模式由控制信号MODE选择，采集数据的总个数由NUM_COLLECT给出。 8.数据采集过程中不能读取，数据读取过程中不能采集-err
Platform: | Size: 5782528 | Author: pengfu | Hits:

[VHDL-FPGA-Verilog] FPGA-LCD12864v

Description: FPGA驱动LCD12864显示，可显示图形和文字，显示内容可根据实际情况而定-FPGA-driven LCD12864 show that can display graphics and text, display content can be determined according to the actual situation
Platform: | Size: 990208 | Author: 冀少威 | Hits:

[VHDL-FPGA-Verilog] FPGA-PS2-interface

Description: FPGA的PS2口接口程序，可识别PS2口键盘的输入-FPGA-PS2 port interface program to identify the mouth PS2 keyboard input
Platform: | Size: 665600 | Author: 冀少威 | Hits:

[VHDL-FPGA-Verilog] fpga

Description: 无线光通信技术具有通信容量大、传输速率高等众多优点, 在许多场合都有重要的应用, 是现代通信技术研究的一个热点。由于脉冲位置调制 ( PPM ) 有较高的平均功率利用率和抗干扰能力, 故 PPM是无线光通信系统中常用的调制方式。在研究 PPM调制技术的基础上, 就基于 FPG A的无线光通信 PPM调制系统进行设计, 并用 V H D L语言完成了系统的设计和仿真。仿真结果表明, 该设计具有正确性和合理性。-Wireless optical communication technology has the communications capacity, many of the benefits of higher transmission rates, in many occasions have important applications in modern communication technologies are a hot research. Because of pulse position modulation (PPM) have a higher average power utilization and anti-interference ability, so PPM is a wireless optical communication system commonly used in modulation. PPM modulation technique in the study on the basis of FPG A based on wireless optical communication PPM modulation system design, and VHDL language achieve the system design and simulation. Simulation results show that the rationality of the design right.
Platform: | Size: 194560 | Author: 朱雯 | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: PWM控制就是产生一定周期，占空比不同的方波信号，当占空比较大时，电机转速较高，否则电机转速较低。当采用FPGA产生PWM波形时，只需FPGA内部资源就可以实现，数字比较器的一端接设定值输出，另一端接线性递增计数器输出。当线性计数器的计数值小于设定值时输出低电平，当计数器大于设定值时输出高电平，这样就可通过改变设定值，产生占空比不同的方波信号，从而达到控制直流电机转速的目的。直流电机控制电路主要由2部分组成，如图1所示：  FPGA中PWM脉宽调制信号产生电路；  FPGA中正/反转方向控制电路 -PWM control is a certain cycle, a different duty cycle square wave signal, when the duty cycle is high, higher motor speed, or lower motor speed. When the PWM waveform generated using FPGA, the FPGA internal resources only can be achieved, the figure one comparator output termination setting, the other linear incremental counter output termination. When the value of linear counter output is less than low-level settings, when the counter output is greater than high settings, so that by changing the settings can produce different duty cycle square wave signal, DC motor control to achieve the purpose of speed. DC motor control circuit mainly by 2 parts, as shown in Figure 1:  FPGA in the PWM pulse width modulation signal generator circuit Chiang Kai-shek  FPGA/reverse direction control circuit
Platform: | Size: 37888 | Author: 袁玉佳 | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: FPGA，vhdl语言的学习资料； FPGA的简单设计 dds的设计-FPGA, vhdl language learning materials FPGA design of a simple design dds
Platform: | Size: 2098176 | Author: wade | Hits:

[VHDL-FPGA-Verilog] Mars_EP1C6F_Interface_demo(VHDL)

Description: FPGA开发板配套VHDL代码。芯片为Mars EP1C6F。一些接口通信的源码。包括7段数码管、I2C通讯等。-FPGA development board support VHDL code. Chips for the Mars EP1C6F. Some of the source interface. Including 7 digital tube, I2C communications.
Platform: | Size: 6206464 | Author: chenlu | Hits:

[VHDL-FPGA-Verilog] Mars_EP1C6F_Comprehansive_demo(VHDL)

Description: FPGA开发板配套VHDL代码。芯片为Mars EP1C6F。综合实验的源码。包括交通灯实验等。-FPGA development board support VHDL code. Chips for the Mars EP1C6F. General experimental source. Experiments, including traffic lights.
Platform: | Size: 805888 | Author: chenlu | Hits:

[VHDL-FPGA-Verilog] FPGA-DE1-PACMAN

Description: Pacman 4 DE1-FPGA-Board
Platform: | Size: 943104 | Author: bert1970 | Hits:

[VHDL-FPGA-Verilog] FFT-FPGA

Description: FFT处理器的FPGA设计方法，适合做信号处理的技术人员参考，用FPGA实现-FFT processor, FPGA design, suitable for signal processing technology for reference, using FPGA to achieve
Platform: | Size: 204800 | Author: bonjour | Hits:

[VHDL-FPGA-Verilog] fpga

Description: 是一些很好的FPGA设计实例，对初学者很好，我就是学这个入门的-Are some very good examples of FPGA design, good for beginners, I learn of this entry
Platform: | Size: 21696512 | Author: hebei | Hits:

[Special Effects] VIDEO-FPGA

Description: 视频采集输出实例，FPGA视频采集和输出-Video Capture output examples
Platform: | Size: 6034432 | Author: 王刚 | Hits:

[VHDL-FPGA-Verilog] jiyu-FPGA-dianziqin

Description: 1) 主芯片：Altera 的FLEX10K20TC144-4 STC89C58RD+。 2) 要求扩展键盘接口电路,可以实现电子琴的一般功能，进行乐曲的手动演奏，此外还应该具有存储功能，可以将演奏的乐曲进行存储并在人工控制下进行回放。 3) 完成系统方案设计。 4) 编制相应的VHDL程序并进行相应的仿真工作，完成系统的调试工作。 5) 编写51系统程序，完成初始化、系统控制等功能。 6) 利用51系统实现系统的在线配置。 7) 发挥部分可以进行乐曲的自动演奏。 -1) Main chipset: Altera' s FLEX10K20TC144-4 STC89C58RD+. 2) require the expansion of the keyboard interface circuit can be achieved general organ function, to music performed manually, in addition should have a storage function, which will perform the music store and playback under manual control. 3) complete the system design. 4) the preparation of the corresponding procedures and the corresponding VHDL simulation work, the completion of system testing. 5) procedures for the preparation of 51 systems to complete the initialization, the system control functions. 6) the use of 51 on-line system configuration. 7) to play some music can be performed automatically.
Platform: | Size: 68608 | Author: 任大志 | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: 华清的培训教材，FPGA。这个是PDF版本的-Training materials Huaqing, FPGA. This is a PDF version of the
Platform: | Size: 2043904 | Author: jiaxuandj | Hits:

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[Software Engineering] FPGA

[VHDL-FPGA-Verilog] FPGA-Ethernet-video

[Other] FPGA

[VHDL-FPGA-Verilog] dds

[Algorithm] FFT(VHDL)

[Other] FPGA.Implementations.of.Neural.Networks

[VHDL-FPGA-Verilog] VHDL

[VHDL-FPGA-Verilog] FPGA-LCD12864v

[VHDL-FPGA-Verilog] FPGA-PS2-interface

[VHDL-FPGA-Verilog] fpga

[VHDL-FPGA-Verilog] VHDL

[VHDL-FPGA-Verilog] FPGA

[VHDL-FPGA-Verilog] Mars_EP1C6F_Interface_demo(VHDL)

[VHDL-FPGA-Verilog] Mars_EP1C6F_Comprehansive_demo(VHDL)

[VHDL-FPGA-Verilog] FPGA-DE1-PACMAN

[VHDL-FPGA-Verilog] FFT-FPGA

[VHDL-FPGA-Verilog] fpga

[Special Effects] VIDEO-FPGA

[VHDL-FPGA-Verilog] jiyu-FPGA-dianziqin

[VHDL-FPGA-Verilog] FPGA

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